1. Technical Field of the Invention
The present invention relates to sense amplification, and particularly to sense amplifier circuits for memory devices having improved operating characteristics.
2. Description of the Related Art
Sense amplifiers have been employed in memory devices for decades. In general terms, a conventional sense amplifier is coupled to an addressed memory cell via a pair of bit lines. When an addressed memory cell is coupled to at least one bit line of the pair of bit lines, a charge differential is developed across the bit line pair. The conventional sense amplifier senses the charge differential appearing across the bit lines of the bit line pair and drives the bit lines to high and low reference voltage levels based upon the polarity of the charge differential. A conventional sense amplifier circuit for a static random access memory (SRAM) and a dynamic random access memory (DRAM) typically includes cross-coupled logic inverters.
Electronic devices, including memory devices, are valued based in part upon their speed. Electronic devices having higher speeds are generally more desirable than similar electronic devices having lower speeds. In this regard, memory devices are valued based in part upon their memory access time. Memory devices having shortened memory access times desirably allow systems employing data storage to perform system operations with increased speed. Consequently, there is an ongoing need for memory devices to have reduced memory access times.
Exemplary embodiments of the present invention provide an improvement over existing sense amplifier circuits for memory devices. In an exemplary embodiment of the present invention, the sense amplifier includes a pair of cross-coupled inverters, with each inverter including at least two transistors. The sense amplifier may further include a first capacitor coupled to a first input/output terminal of the sense amplifier and a second capacitor coupled to a second input/output terminal of the sense amplifier. In this way, a change in voltage appearing across the first input/output terminal and the second input/output terminal bootstraps the cross-coupled inverters to facilitate activation and deactivation of the transistors forming the cross-coupled inverters. The employment of the first and second capacitors is seen to improve the sensitivity and the response time of the sense amplifier.